#Hiring for STDCELL Characterization Engineer – Noida with 5-12 years of experience Qualification: Good understanding of STDCELL Characterization using Silicon Smart or equivalent industry tool Understanding of different EDA view for logic library like AOCV, POCV, LVF, EM, UPF, MIS etc In-depth knowledge in functionality of CMOS combinatorial logic and sequential circuit and layout, and standard cell modeling, extraction and characterization. Experience in EDA tool/flow/methodology, product and IP developments. Knowledge of scripting language is mandatory (Proficient in PERL/SHELL scripting) TCL, and knowledge on SNPS tools is a plus The candidate needs to have strong communication and interpersonal skills to champion initiatives internally and externally. The candidate needs to possess Technical, analytical and cross-functional collaboration skills. Hands-on experience characterizing physical IPs Strong experience with simulation tools like Monte Carlo, Hspice, Finesim, Nanosim, Hsim etc. and Synopsys liberty format description is required. STDCELL IP characterization flow development Knowledge of the complete characterization flows, library validation and timing/ power characterization methodologies for standard cells. Good understanding of CMOS circuit design fundamentals Familiarity with Simulators (HSPICE, FineSim), understanding of schematic and parasitic extraction, liberty syntax requirements, CCS, statistical characterization, Verilog models, STA and power analysis tools. Hands-on experience on APL model generation for RH IR drop analysis. Hands-on experience on IP modeling (Verilog) 3P benchmarking / STA basics /comparisons at liberty level The candidate should have B.Tech or M.Tech in Electronics/Electrical/VLSI Design Engineering Interested candidate can share their CVs on exceedmanpowerconsultants@gmail.com with the subject line STDCELL Characterization Engineer – Noida #stdcell #semiconductors #semiconductor